Matching pair transistors: SMSIT121-01 MONOLITHIC DUAL NPN TRANSISTORS same as Intersil IT121, Linear Integrated Systems IT121 TO78 Linear Integrated Systems IT121 manufactured by Semiconix Semiconductor - Gold chip technology for known good Matching pair transistors die, Matching pair transistors flip chip, Matching pair transistors die, wafer foundry for discrete semiconductors, integrated circuits and integrated passive components from Semiconix Semiconductor Matching pair transistors: SMSIT121-01 MONOLITHIC DUAL NPN TRANSISTORS same as Intersil IT121, Linear Integrated Systems IT121 TO78 Linear Integrated Systems IT121 manufactured by Semiconix Semiconductor - Gold chip technology for known good Matching pair transistors die, Matching pair transistors flip chip, Matching pair transistors die, wafer foundry for discrete semiconductors, integrated circuits and integrated passive components manufactured by Semiconix Semiconductor. Gold metallization for interconnections instead of aluminum or copper, for high reliability devices for system in package applications using silicon printed circuit boards, ceramic substrates or chip on board, assembled via flip chip or chip and wire. TO78 Intersil IT121, Linear Integrated Systems IT121 Linear Integrated Systems IT121,SMSIT121-01,Dual NPN,,Matching pair transistors, gold,chip,goldchip,gold chip technology, known good die, flip chip, bare die, wafer foundry, discrete semiconductors, integrated circuits, integrated passive components,gold metallization, aluminum, copper, system in package, SIP, silicon printed circuit board, silicon PCB, ceramic substrates, chip on board, flip chip, chip and gold wire Matching pair transistors: SMSIT121-01 MONOLITHIC DUAL NPN TRANSISTORS same as Intersil IT121, Linear Integrated Systems IT121 TO78 Linear Integrated Systems IT121 manufactured by Semiconix Semiconductor - Gold chip technology for known good Matching pair transistors die, Matching pair transistors flip chip, Matching pair transistors die, wafer foundry for discrete semiconductors, integrated circuits and integrated passive components from Semiconix Semiconductor Matching pair transistors: SMSIT121-01 MONOLITHIC DUAL NPN TRANSISTORS same as Intersil IT121, Linear Integrated Systems IT121 TO78 Linear Integrated Systems IT121 manufactured by Semiconix Semiconductor - Gold chip technology for known good Matching pair transistors die, Matching pair transistors flip chip, Matching pair transistors die, wafer foundry for discrete semiconductors, integrated circuits and integrated passive components manufactured by Semiconix Semiconductor. Gold metallization for interconnections instead of aluminum or copper, for high reliability devices for system in package applications using silicon printed circuit boards, ceramic substrates or chip on board, assembled via flip chip or chip and wire. TO78 Intersil IT121, Linear Integrated Systems IT121 Linear Integrated Systems IT121,SMSIT121-01,Dual NPN,,Matching pair transistors, gold,chip,goldchip,gold chip technology, known good die, flip chip, bare die, wafer foundry, discrete semiconductors, integrated circuits, integrated passive components,gold metallization, aluminum, copper, system in package, SIP, silicon printed circuit board, silicon PCB, ceramic substrates, chip on board, flip chip, chip and gold wire /images/watermark.gif);background-position: center center;background-repeat: repeat-y;"> REGISTER-LOGIN PRODUCTS CROSS REFERENCE /cgi-bin/stock.pl?part=SMSIT121-01">INVENTORY /cgi-bin/rfq.cgi?site=&rows=1&item_1=SMSIT121-01-BD&c_item_1=MONOLITHIC%20DUAL%20NPN%20TRANSISTORS BD">REQUEST QUOTE smxrootwww.semiconix.com/cgi-bin/order.cgi?site=&rows=1&item_1=SMSIT121-01-BD&c_item_1=MONOLITHIC%20DUAL%20 NPN%20TRANSISTORS BD">ORDER ONLINE SITE MAP semiconix semiconductor - where the future is today - gold chip technology SMSIT121-01 - BARE DIE GOLD CHIP TECHNOLOGY™ MONOLITHIC DUAL NPN TRANSISTORS FEATURES APPLICATIONS MONOLITHIC DUAL NPN TRANSISTORS - BARE DIE Direct Replacement for Linear Integrated Systems IT121, Intersil IT121 Series, Pin for Pin Compatible Extremely low broadband noise Improved performance of current mirror and differential amplifier circuits Drop-in replacement for standard double transistors Simplified board layout Eliminates the need for costly additional trimming Base-emitter voltage matching Current gain matching High reliability bare die Gold metallization RoHS compliant, Lead Free Compatible with chip and wire assemblies Non-linear designs, multipliers, dividers, squaring circuits Logarithmic converters, amplifiers Voltage-controlled amplifiers Low-noise, low-drift instrumentation amplifiers Differential amplifiers Voltage references Current mirrors Comparators Thermometers Chip on Board System in package SIP Hybrid Circuits SMSIT121-01 IT121 MONOLITHIC DUAL NPN TRANSISTORS SMSIT121-01 Intersil IT121, Linear Integrated Systems IT121 Linear Integrated Systems IT121 MONOLITHIC DUAL NPN TRANSISTORS MONOLITHIC DUAL NPN TRANSISTORS - PRODUCT DESCRIPTION Matched pair transistors ensure accurate base-emitter voltage (VBE1 / VBE2) and current gain (hFE1 / hFE2) matching and are fully internally isolated. As a replacement for standard double transistors in current mirror and differential amplifier applications, they eliminate the need for further costly trimming. They can also be used with an additional single or double transistor to deliver operational amplifier functionality at minimal product cost. Dual Transistors Bipolar Silicon Transistors BD series products available in die form are ideal for high reliability hybrid circuits and multi chip module applications. HIGH RELIABILITY BARE DIE AND SYSTEM IN PACKAGE - SHORT APPLICATION NOTE COB (Chip on Board) and SiP (System-in-Package) are integrating proven mature products in bare die of mixed technologies i.e. Si, GaAs, GaN, InP, passive components, etc that cannot be easily implemented in SOC (System-on-Chip) technology. COB and SiP have small size footprint, high density, shorter design cycle time, easier to redesign and rework, use simpler and less expensive assembly process. For extreme applications the bare die has to withstand also harsh environmental conditions without the protection of a package. KGD, Known Good Die concept is no longer satisfactory if the die cannot withstand harsh environmental conditions and degrades. Standard semiconductor devices supplied by many manufacturers in bare die are build with exposed aluminum pads that are extremely sensitive to moisture and corrosive components of the atmosphere. Semiconix has reengineered industry standard products and now offers known good die for bare die applications with gold interconnection and well-engineered materials that further enhance the die reliability. Semiconix also offers Silicon Printed Circuit Board technology with integrated passive components as a complete high reliability SIP solution for medical, military and space applications. See AN-SMX-001 DISCRETE SEMICONDUCTORS MANUFACTURING PROCESS Discrete semiconductors are manufactured using Semiconix in house high reliability semiconductor manufacturing processes. All semiconductor devices employ precision doping via ion implantation, silicon nitride junction passivation, platinum silicided contacts and gold interconnect metallization for best performance and reliability. MNOS capacitors, Tantalum Nitride TaN or Sichrome SiCr thin film resistors are easily integrated with discrete semiconductors on same chip to obtain standard and custom complex discrete device solutions. Absolute Maximum Ratings * Ta = 25°C unless otherwise noted Parameter Symbol Value Unit Collector Current IC 10 mA Storage Temperature Range TSTG -65 to 200 °C Operating Temperature TOP -55 to 150 °C Power Dissipation PD 250 mW Electrical Characteristics* TC = 25°C unless otherwise noted Name Symbol Test Conditions Value Unit Min. Typ. Max Collector-Emitter Breakdown Voltage V(BR)CBO IC= 10mA IE= 0 45 V Collector-Base Breakdown Voltage V(BR)CEO IC= 10mA IB= 0 45 V Emitter-Base Breakdown Voltage BVEBO IE= 10mA IC= 0 6.2 V Collector toCollector Voltage BVCCO IC= 10mA IE= 0 60 Collector-Cutoff Current ICBO E= 0 VCB= 45V 1 nA Emitter Cut-off Current IEBO C= 0 VEB= 3V 1 nA DC Current Gain hfe IC= 10mA VCE= 5V 80 DC Current Gain hfe IC= 1.0mA VCE= 5V 100 Collector-Emitter Saturation Voltage VCE(sat) IC= 0.5mA IB= 0.05mA 0.5 V Current Gain - Bandwidth Product fT IC= 1mA VCE= 5V 180 MHz Output Capacitance Ccb IE= 0 VCB= 5V 2 pF Collector to Collector Capacitance CC1C2 VCC= 0 2 pF Collector to Collector Leakage Current IC1C2 VCC=±60V 10 nA Noise Figure NF IC= 100mA VCE= 5V,BW= 200Hz, RG= 10 KW,f=1KHz 3 dB Base Emitter Voltage Differential |VBE1-VBE2| IC= 10 mA VCE= 5V 3 mV Base Emitter Voltage Differential Change with Temperature Δ|(VBE1-VBE2)|/ΔT IC= 10 mA VCE= 5V,T= -55°C to +125°C 10 mV/°C Base Current Differential IB1-IB2| IC= 10 mA VCE= 5V 25 nA SPICE MODEL CROSS REFERENCE PARTS: GENERAL DIE INFORMATION Substrate Thickness [mils] Die size [mils] Bonding pads Backside metallization Silicon 6±1 26x29±2 Pad metal is TiW/Au, 4µm±1 thick, 99.99% electroplated gold with TiW barrier. Custom metallization available upon request. P/N Metal Die attach process -BD0 Au/Si Au/Si eutectic -BD1 Ti/Pd/Au AuSn,AuGe -BD2 Ti/Pt/Au AuSn,AuGe -BD3 Ti/Ni/Au Soft Solder SAC -BD4 Ti/Pt/AuSn AuSn eutectic LAYOUT / DIMENSIONS / PAD LOCATIONS Actual die layout may vary SMSIT121-01 Intersil IT121, Linear Integrated Systems IT121 Linear Integrated Systems IT121 MONOLITHIC DUAL NPN TRANSISTORS SMSIT121-01 Intersil IT121, Linear Integrated Systems IT121 Linear Integrated Systems IT121 MONOLITHIC DUAL NPN TRANSISTORS SMSIT121-01 Intersil IT121, Linear Integrated Systems IT121 Linear Integrated Systems IT121 MONOLITHIC DUAL NPN TRANSISTORS SEMICONDUCTOR ASSEMBLY PROCESS - SHORT APPLICATION NOTE Semiconix standard bare die components are designed for thermosonic GOLD wire bonding and AuSi eutectic die attach. For AuSn or AuGe die attach process, Ti/Pt/Au or Ti/Pd/Au are recommended backside metallization. For soft solder die attach, backside metallization may be any of Ti/Ni/Au, Ti/Pt/Au, Ti/Pd/Au. For silver filled conductive epoxy die attach, AuSi as well as Ti/Ni/Au, Ti/Pt/Au, Ti/Pd/Au may be used. In general, after die attach, prior to wire bonding operation an oxygen RF plasma clean operation is recommended. IMPORTANT NOTE: Aluminum wire should not be used with gold pads due to potential reliability problem known as purple plague. Same it applies to Aluminum bonding pads with gold wire! In the transition from SnPb solder to lead free and RoHS compliant packaging and assembly processes the reflow temperature has increased in some cases from 180°C to 220°C. This may cause an increase of the rate of formation of gold aluminum intermetallic compounds that are brittle and are conducive to increased contact resistance and or bond failure. See Application note AN-SMX-000. STANDARD PRODUCTS ORDERING INFORMATION SMS P/N WAFFLE PACKS QUANTITY U/P($) FILM FRAME MIN QUANTITY U/P($) SMSIT121-01-BD -WP 10000 -FF 5700 SMSIT121-01-BD -WP 50000 -FF 28500 PRICES - Listed prices are only for standard products, available from stock. Inventory is periodically updated. List prices for other quantities and tolerances are available on line through Instant Quote. For standard products available from stock, there is a minimum line item order of $550.00. No rights can be derived from pricing information provided on this website. Such information is indicative only, for budgetary use only and subject to change by SEMICONIX SEMICONDUCTOR at any time and without notice. LEAD TIMES - Typical delivery for standard products is 4-6 weeks ARO. For custom devices consult factory for an update on minim orders and lead times. CONTINOUS SUPPLY - Semiconix guarantees continuous supply and availability of any of its standard products provided minimum order quantities are met. CUSTOM PRODUCTS - For custom products sold as tested, bare die or known good die KGD, there will be a minimum order quantity MOQ. Dice are 100% functional tested, visual inspected and shipped in antistatic waffle packs. For high volume and pick and place applications, dice are also shipped on film frame -FF. For special die level KGD requirements, different packaging or custom configurations, contact sales via CONTACTS page. SAMPLES - Samples are available only for customers that have issued firm orders pending qualification of product in a particular application. ORDERING - Semiconix accepts only orders placed on line by registered customers. On line orders are verified, accepted and acknowledged by Semiconix sales department in writing. Accepted orders are non cancelable binding contracts. SHIPING - Dice are 100% functional tested, visual inspected and shipped in antistatic waffle packs. For high volume and pick and place applications, dice are also shipped on film frame -FF. /cgi-bin/rfq.cgi" method="post" target="new"> INSTANT QUOTE Semiconix P/N Quantity E-mail DISCLAIMER - SEMICONIX has made every effort to have this information as accurate as possible. However, no responsibility is assumed by SEMICONIX for its use, nor for any infringements of rights of third parties, which may result from its use. SEMICONIX reserves the right to revise the content or modify its product line without prior notice. SEMICONIX products are not authorized for and should not be used within support systems, which are intended for surgical implants into the body, to support or sustain life, in aircraft, space equipment, submarine, or nuclear facility applications without the specific written consent. HOME PRODUCT TREE PACKAGES /cgi-bin/getpdf.pl?part=SMSIT121-01-BD&idx=10">PDF VERSION SEARCH SEMICONIX SEMICONDUCTOR www.semiconix-semiconductor.com Tel:(408)986-8026 Fax:(408)986-8027 SEMICONIX SEMICONDUCTOR Last updated: Display settings for best viewing: Current display settings: Page hits: Screen resolution: 1124x864 Screen resolution: Total site visits: Color quality: 16 bit Color quality: bit © 1990- SEMICONIX SEMICONDUCTOR All rights reserved. No material from this site may be used or reproduced without permission.

REGISTER-LOGIN PRODUCTS CROSS REFERENCE INVENTORY REQUEST QUOTE ORDER ONLINE SITE MAP

   
semiconix semiconductor - where the future is today - gold chip technology SMSIT121-01 - BARE DIE
GOLD CHIP TECHNOLOGY™ MONOLITHIC DUAL NPN TRANSISTORS

FEATURES APPLICATIONS MONOLITHIC DUAL NPN TRANSISTORS - BARE DIE
Direct Replacement for Linear Integrated Systems IT121, Intersil IT121 Series, Pin for Pin Compatible
Extremely low broadband noise
Improved performance of current mirror and differential amplifier circuits
Drop-in replacement for standard double transistors
Simplified board layout
Eliminates the need for costly additional trimming
Base-emitter voltage matching
Current gain matching
High reliability bare die
Gold metallization
RoHS compliant, Lead Free
Compatible with chip and wire assemblies
Non-linear designs, multipliers, dividers, squaring circuits
Logarithmic converters, amplifiers
Voltage-controlled amplifiers
Low-noise, low-drift instrumentation amplifiers
Differential amplifiers
Voltage references
Current mirrors
Comparators
Thermometers
Chip on Board
System in package SIP
Hybrid Circuits
SMSIT121-01 IT121 MONOLITHIC DUAL NPN TRANSISTORS
SMSIT121-01 Intersil IT121, Linear Integrated Systems IT121 Linear Integrated Systems IT121 MONOLITHIC DUAL NPN TRANSISTORS

MONOLITHIC DUAL NPN TRANSISTORS - PRODUCT DESCRIPTION
Matched pair transistors ensure accurate base-emitter voltage (VBE1 / VBE2) and current gain (hFE1 / hFE2) matching and are fully internally isolated. As a replacement for standard double transistors in current mirror and differential amplifier applications, they eliminate the need for further costly trimming. They can also be used with an additional single or double transistor to deliver operational amplifier functionality at minimal product cost.
Dual Transistors Bipolar Silicon Transistors BD series products available in die form are ideal for high reliability hybrid circuits and multi chip module applications.

HIGH RELIABILITY BARE DIE AND SYSTEM IN PACKAGE - SHORT APPLICATION NOTE
COB (Chip on Board) and SiP (System-in-Package) are integrating proven mature products in bare die of mixed technologies i.e. Si, GaAs, GaN, InP, passive components, etc that cannot be easily implemented in SOC (System-on-Chip) technology. COB and SiP have small size footprint, high density, shorter design cycle time, easier to redesign and rework, use simpler and less expensive assembly process. For extreme applications the bare die has to withstand also harsh environmental conditions without the protection of a package. KGD, Known Good Die concept is no longer satisfactory if the die cannot withstand harsh environmental conditions and degrades. Standard semiconductor devices supplied by many manufacturers in bare die are build with exposed aluminum pads that are extremely sensitive to moisture and corrosive components of the atmosphere. Semiconix has reengineered industry standard products and now offers known good die for bare die applications with gold interconnection and well-engineered materials that further enhance the die reliability. Semiconix also offers Silicon Printed Circuit Board technology with integrated passive components as a complete high reliability SIP solution for medical, military and space applications. See AN-SMX-001

DISCRETE SEMICONDUCTORS MANUFACTURING PROCESS
Discrete semiconductors are manufactured using Semiconix in house high reliability semiconductor manufacturing processes. All semiconductor devices employ precision doping via ion implantation, silicon nitride junction passivation, platinum silicided contacts and gold interconnect metallization for best performance and reliability. MNOS capacitors, Tantalum Nitride TaN or Sichrome SiCr thin film resistors are easily integrated with discrete semiconductors on same chip to obtain standard and custom complex discrete device solutions.

Absolute Maximum Ratings * Ta = 25°C unless otherwise noted
Parameter Symbol Value Unit
Collector Current IC 10 mA
Storage Temperature Range TSTG -65 to 200 °C
Operating Temperature TOP -55 to 150 °C
Power Dissipation PD 250 mW

Electrical Characteristics* TC = 25°C unless otherwise noted
Name Symbol Test Conditions Value Unit
Min. Typ. Max
Collector-Emitter Breakdown Voltage V(BR)CBO IC= 10mA IE= 0 45 V
Collector-Base Breakdown Voltage V(BR)CEO IC= 10mA IB= 0 45 V
Emitter-Base Breakdown Voltage BVEBO IE= 10mA IC= 0 6.2 V
Collector toCollector Voltage BVCCO IC= 10mA IE= 0 60
Collector-Cutoff Current ICBO E= 0 VCB= 45V 1 nA
Emitter Cut-off Current IEBO C= 0 VEB= 3V 1 nA
DC Current Gain hfe IC= 10mA VCE= 5V 80
DC Current Gain hfe IC= 1.0mA VCE= 5V 100
Collector-Emitter Saturation Voltage VCE(sat) IC= 0.5mA IB= 0.05mA 0.5 V
Current Gain - Bandwidth Product fT IC= 1mA VCE= 5V 180 MHz
Output Capacitance Ccb IE= 0 VCB= 5V 2 pF
Collector to Collector Capacitance CC1C2 VCC= 0 2 pF
Collector to Collector Leakage Current IC1C2 VCC=±60V 10 nA
Noise Figure NF IC= 100mA VCE= 5V,BW= 200Hz, RG= 10 KW,f=1KHz 3 dB
Base Emitter Voltage Differential |VBE1-VBE2| IC= 10 mA VCE= 5V 3 mV
Base Emitter Voltage Differential Change with Temperature Δ|(VBE1-VBE2)|/ΔT IC= 10 mA VCE= 5V,T= -55°C to +125°C 10 mV/°C
Base Current Differential IB1-IB2| IC= 10 mA VCE= 5V 25 nA
SPICE MODEL
Spice model pending.
CROSS REFERENCE PARTS: Intersil IT121, Linear Integrated Systems IT121

GENERAL DIE INFORMATION
Substrate Thickness
[mils]
Die size
[mils]
Bonding pads Backside metallization
Silicon 6±1 26x29±2 Pad metal is TiW/Au, 4µm±1 thick, 99.99% electroplated gold with TiW barrier. Custom metallization available upon request.
P/N MetalDie attach process
-BD0Au/SiAu/Si eutectic
-BD1Ti/Pd/AuAuSn,AuGe
-BD2Ti/Pt/AuAuSn,AuGe
-BD3Ti/Ni/AuSoft Solder SAC
-BD4Ti/Pt/AuSnAuSn eutectic

LAYOUT / DIMENSIONS / PAD LOCATIONS
Actual die layout may vary
SMSIT121-01 Intersil IT121, Linear Integrated Systems IT121 Linear Integrated Systems IT121 MONOLITHIC DUAL NPN TRANSISTORS SMSIT121-01 Intersil IT121, Linear Integrated Systems IT121 Linear Integrated Systems IT121 MONOLITHIC DUAL NPN TRANSISTORS
SMSIT121-01 Intersil IT121, Linear Integrated Systems IT121 Linear Integrated Systems IT121 MONOLITHIC DUAL NPN TRANSISTORS

SEMICONDUCTOR ASSEMBLY PROCESS - SHORT APPLICATION NOTE
Semiconix standard bare die components are designed for thermosonic GOLD wire bonding and AuSi eutectic die attach. For AuSn or AuGe die attach process, Ti/Pt/Au or Ti/Pd/Au are recommended backside metallization.
For soft solder die attach, backside metallization may be any of Ti/Ni/Au, Ti/Pt/Au, Ti/Pd/Au.
For silver filled conductive epoxy die attach, AuSi as well as Ti/Ni/Au, Ti/Pt/Au, Ti/Pd/Au may be used.
In general, after die attach, prior to wire bonding operation an oxygen RF plasma clean operation is recommended.
IMPORTANT NOTE: Aluminum wire should not be used with gold pads due to potential reliability problem known as purple plague. Same it applies to Aluminum bonding pads with gold wire! In the transition from SnPb solder to lead free and RoHS compliant packaging and assembly processes the reflow temperature has increased in some cases from 180°C to 220°C. This may cause an increase of the rate of formation of gold aluminum intermetallic compounds that are brittle and are conducive to increased contact resistance and or bond failure. See Application note AN-SMX-000.

STANDARD PRODUCTS ORDERING INFORMATION

SMS P/N WAFFLE PACKS QUANTITY U/P($) FILM FRAME MIN QUANTITY U/P($)
SMSIT121-01-BD -WP 10000 -FF 5700
SMSIT121-01-BD -WP 50000 -FF 28500

PRICES - Listed prices are only for standard products, available from stock. Inventory is periodically updated. List prices for other quantities and tolerances are available on line through Instant Quote. For standard products available from stock, there is a minimum line item order of $550.00. No rights can be derived from pricing information provided on this website. Such information is indicative only, for budgetary use only and subject to change by SEMICONIX SEMICONDUCTOR at any time and without notice.
LEAD TIMES - Typical delivery for standard products is 4-6 weeks ARO. For custom devices consult factory for an update on minim orders and lead times.
CONTINOUS SUPPLY - Semiconix guarantees continuous supply and availability of any of its standard products provided minimum order quantities are met.
CUSTOM PRODUCTS - For custom products sold as tested, bare die or known good die KGD, there will be a minimum order quantity MOQ. Dice are 100% functional tested, visual inspected and shipped in antistatic waffle packs. For high volume and pick and place applications, dice are also shipped on film frame -FF. For special die level KGD requirements, different packaging or custom configurations, contact sales via CONTACTS page.
SAMPLES - Samples are available only for customers that have issued firm orders pending qualification of product in a particular application.
ORDERING - Semiconix accepts only orders placed on line by registered customers. On line orders are verified, accepted and acknowledged by Semiconix sales department in writing. Accepted orders are non cancelable binding contracts.
SHIPING - Dice are 100% functional tested, visual inspected and shipped in antistatic waffle packs. For high volume and pick and place applications, dice are also shipped on film frame -FF.

INSTANT QUOTE
Semiconix P/N Quantity E-mail    

DISCLAIMER - SEMICONIX has made every effort to have this information as accurate as possible. However, no responsibility is assumed by SEMICONIX for its use, nor for any infringements of rights of third parties, which may result from its use. SEMICONIX reserves the right to revise the content or modify its product line without prior notice. SEMICONIX products are not authorized for and should not be used within support systems, which are intended for surgical implants into the body, to support or sustain life, in aircraft, space equipment, submarine, or nuclear facility applications without the specific written consent.

HOME PRODUCT TREE PACKAGES PDF VERSION SEARCH

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